# 7. Operators

VHDL supports different classes of operators that operate on signals, variables and constants. The different classes of operators are summarized below.

Class |
||||||

1. Logical operators | and |
or |
nand |
nor |
xor |
xnor |

2. Relational operators | = |
/= |
< |
<= |
> |
>= |

3. Shift operators | sll |
srl |
sla |
sra |
rol |
ror |

4.Addition operators | + |
= |
& |
|||

5. Unary operators | + |
– |
||||

6. Multiplying op. | * |
/ |
mod |
rem |
||

7. Miscellaneous op. | ** |
abs |
not |

The order of precedence is the highest for the operators of class 7, followed by class 6 with the lowest precedence for class 1. Unless parentheses are used, the operators with the highest precedence are applied first. Operators of the same class have the same precedence and are applied from left to right in an expression. As an example, consider the following std_ulogic_vectors, X (=’010’), Y(=’10’), and Z (‘10101’). The expression

**not** X & Y **xor** Z **rol** 1

is equivalent to ((**not** X) & Y) **xor** (Z **rol** 1) = ((101) & 10) **xor** (01011) =(10110) **xor **(01011) = 11101. The xor is executed on a bit-per-bit basis.

__Logic operators__

The logic operators (and, or, nand, nor, xor and xnor) are defined for the “bit”, “boolean”, “std_logic” and “std_ulogic” types and their vectors. They are used to define Boolean logic expression or to perform bit-per-bit operations on arrays of bits. They give a result of the same type as the operand (Bit or Boolean). These operators can be applied to signals, variables and constants.

Notice that the nand and nor operators are not associative. One should use parentheses in a sequence of nand or nor operators to prevent a syntax error:

X **nand** Y **nand** Z will give a syntax error and should be written as (X **nand** Y) **nand** Z.

__Relational____operators__

The relational operators test the relative values of two scalar types and give as result a Boolean output of “TRUE” or “FALSE”.

Operator |
Description |
Operand Types |
Result Type |

= | Equality | any type | Boolean |

/= | Inequality | any type | Boolean |

< | Smaller than | scalar or discrete array types | Boolean |

<= | Smaller than or equal | scalar or discrete array types | Boolean |

> | Greater than | scalar or discrete array types | Boolean |

>= | Greater than or equal | scalar or discrete array types | Boolean |

Notice that symbol of the operator “<=” (smaller or equal to) is the same one as the assignment operator used to assign a value to a signal or variable. In the following examples the first “<=” symbol is the assignment operator. Some examples of relational operations are:

**variable **STS : Boolean;

**constant** A : integer :=24;

**constant** B_COUNT : integer :=32;

**constant** C : integer :=14;

STS <= (A < B_COUNT) ; — will assign the value “TRUE” to STS

STS <= ((A >= B_COUNT) **or** (A > C)); — will result in “TRUE”

STS <= (std_logic (‘1’, ‘0’, ‘1’) < std_logic(‘0’, ‘1’,’1’));–makes STS “FALSE”

**type** new_std_logic **is** (‘0’, ‘1’, ‘Z’, ‘-‘);

**variable** A1: **new_std_logic** :=’1’;

**variable** A2: **new_std_logic** :=’Z’;

STS <= (A1 < A2); will result in “TRUE” since ‘1’ occurs to the left of ‘Z’.

For discrete array types, the comparison is done on an element-per-element basis, starting from the left towards the right, as illustrated by the last two examples.

__Shift____operators__

These operators perform a bit-wise shift or rotate operation on a one-dimensional array of elements of the type bit (or std_logic) or Boolean.

Operator |
Description |
Operand Type |
Result Type |

sll |
Shift left logical (fill right vacated bits with the 0) | Left: Any one-dimensional array type with elements of type bit or Boolean; Right: integer | Same as left type |

srl |
Shift right logical (fill left vacated bits with 0) | same as above | Same as left type |

sla |
Shift left arithmetic (fill right vacated bits with rightmost bit) | same as above | Same as left type |

sra |
Shift right arithmetic (fill left vacated bits with leftmost bit) | same as above | Same as left type |

rol |
Rotate left (circular) | same as above | Same as left type |

ror |
Rotate right (circular) | same as above | Same as left type |

The operand is on the left of the operator and the number (integer) of shifts is on the right side of the operator. As an example,

**variable** NUM1 :bit_vector := “10010110”;

NUM1 **srl** 2;

will result in the number “00100101”.

When a negative integer is given, the opposite action occurs, i.e. a shift to the left will be a shift to the right. As an example

NUM1 **srl** –2 would be equivalent to NUM1 **sll** 2 and give the result “01011000”.

Other examples of shift operations are for the bit_vector A = “101001”

variable A: bit_vector :=”101001”; |

A A A A A A |

__Addition____operators__

The addition operators are used to perform arithmetic operation (addition and subtraction) on operands of any numeric type. The concatenation (&) operator is used to concatenate two vectors together to make a longer one. In order to use these operators one has to specify the ieee.std_logic_unsigned.all or std_logic_arith package package in addition to the ieee.std_logic_1164 package.

Operator |
Description |
Left Operand Type |
Right Operand Type |
Result Type |

+ | Addition | Numeric type | Same as left operand | Same type |

– | Subtraction | Numeric type | Same as left operand | Same type |

& | Concatenation | Array or element type | Same as left operand | Same array type |

An example of concatenation is the grouping of signals into a single bus [4].

**signal** MYBUS :std_logic_vector (15 **downto** 0);

**signal** STATUS :std_logic_vector (2 **downto** 0);

**signal** RW, CS1, CS2 :std_logic;

**signal** MDATA :std_logic_vector ( 0 **to** 9);

MYBUS <= STATUS & RW & CS1 & SC2 & MDATA;

Other examples are

MYARRAY (15 **downto** 0) <= “1111_1111” & MDATA (2 **to** 9);

NEWWORD <= “VHDL” & “93”;

The first example results in filling up the first 8 leftmost bits of MYARRAY with 1’s and the rest with the 8 rightmost bits of MDATA. The last example results in an array of characters “VHDL93”.

__Unary____operators__

The unary operators “+” and “-“ are used to specify the sign of a numeric type.

Operator |
Description |
Operand Type |
Result Type |

+ | Identity | Any numeric type | Same type |

– | Negation | Any numeric type | Same type |

__Multiplying____operators__

The multiplying operators are used to perform mathematical functions on numeric types (integer or floating point).

Operator |
Description |
Left Operand Type |
Right Operand Type |
Result Type |

* |
Multiplication |
Any integer or floating point | Same type | Same type |

Any physical type | Integer or real type | Same as left | ||

Any integer or real type | Any physical type | Same as right | ||

/ | Division | Any integer or floating point | Any integer or floating point | Same type |

Any physical type | Any integer or real t ype | Same as left | ||

Any physical type | Same type | Integer | ||

mod |
Modulus | Any integer type | Same type | |

rem |
Remainder | Any integer type | Same type |

The multiplication operator is also defined when one of the operands is a physical type and the other an integer or real type.

The remainder (rem) and modulus (mod) are defined as follows:

A **rem** B = A –(A/B)*B (in which A/B in an integer)

A **mod** B = A – B * N (in which N is an integer)

The result of the **rem** operator has the sign of its first operand while the result of the **mod** operators has the sign of the second operand.

Some examples of these operators are given below.

11 **rem** 4 results in 3

(-11) **rem** 4 results in -3

9 **mod** 4 results in 1

7 **mod** (-4) results in –1 (7 – 4*2 = -1).

__Miscellaneous____operators__

These are the absolute value and exponentation operators that can be applied to numeric types. The logical negation (not) results in the inverse polarity but the same type.

Operator |
Description |
Left Operand Type |
Right Operand Type |
Result Type |

** | Exponentiation | Integer type | Integer type | Same as left |

Floating point | Integer type | Same as left | ||

abs |
Absolute value | Any numeric type | Same type | |

not |
Logical negation | Any bit or Boolean type | Same type |

Delays or timing information

Packages (list standard, 1164 packages).